Nectrion builds high-performance analog and RF IP and chip products — using a proprietary AI-native design system that makes design exploration, verification, and evidence generation faster and more reproducible.
Analog, RF, and mixed-signal design is slow, expert-constrained, and hard to reproduce. Closure depends on veteran intuition; evidence lives in scattered scripts and spreadsheets; every process migration risks silent breakage. Nectrion turns design work into reusable evidence, reusable IP, and repeatable engineering flows. The point isn't replacing designers — it's stronger design-space exploration and auditable closure, with engineers kept at the judgment level.
Nectrion compounds three asset classes — analog/RF IP, chip products, and a proprietary design system that makes both faster to produce. The design system is internal leverage, not a tool we license: it's why our IP and products close faster and reproduce reliably.
Silicon-oriented signal-chain, RF front-end, and mixed-signal building blocks — delivered with the evidence, provenance, and replay that produced them.
Fixed-scope analog and RF design engagements for teams that need fast, reproducible closure and clean integration with their existing flow.
Nectrion-branded analog and mixed-signal silicon for high-volume anchor markets, built on the same IP and design system as the services and licensing work.
Our internal leverage layer: typed design artifacts, replay-safe execution, multi-PDK abstraction, and optimizer-driven closure. Used to build everything above — not sold as another tool.
We hold ourselves to reproducible evidence at a clearly stated tier. The current flagship is a multi-topology electronic-warfare LNA design-closure campaign.
Nectrion ran a multi-topology electronic-warfare LNA design-closure campaign on the IHP SG13G2 process, producing evidence for a PVT-characterized wideband front-end and a documented 5 V path demonstrating that full-linearity operation is reachable — with power and worst-case linearity still staged as program tradeoffs. The campaign generated replayable artifacts, design-closure reports, and measured trade-off evidence across process and temperature corners — mapping which specifications are simultaneously reachable and which are structurally not — rather than a single optimistic data point.
Nectrion serves teams that ship analog and RF silicon — whether the chip is a metering AFE, an EV battery monitor, an RF front-end, or a defense radar subsystem. We work with OEMs, SoC integrators, and fabless design teams worldwide.
AFEs, signal-chain blocks, and integrated solutions for smart-meter and industrial-metering programs at volume.
RF and mixed-signal subsystems with the provenance, replayability, and audit trail that high-reliability procurement requires.
Battery-management, motor-control, and on-board-charger analog and mixed-signal blocks for the EV and Tier-1 automotive ecosystem.
RF front-end and mixed-signal infrastructure for telecom equipment, base-station, and CPE builders across open and partner foundries.
Analog and RF design partnerships for global mid-tier fabless companies that need fast turnaround without a full internal analog team.
For customer engineers and prospective hires: the technical surface is concrete, typed, and verifiable. We integrate with the tools you already use, and we treat every artifact in the pipeline as a first-class object.
Pydantic-validated schemas at every hand-off in the design flow.
Typed adapters to the simulators and PDK tooling we build on — inputs to our design engine, not a tool we resell.
Registry, resolver, and emitter layers abstract PDK details out of the design loop.
Typed obligations, computed closure, every run replayable.
We're hiring senior analog and RF engineers, AI/ML engineers focused on optimization and surrogate modeling, and infrastructure engineers comfortable with typed systems. The bar is high; the work is concrete; it targets real silicon.
Email careersFor semiconductor teams, OEMs, SoC integrators, fabless companies, and foundry / packaging partners.
Email the teamFor senior analog, RF, AI/ML, and infrastructure engineers. Send a short note and a CV or links to your work.
Email careersFor inbound investor outreach. We respond with a deck and a design-system walkthrough on request.
Email investor relations